Pdiff guard ring around nmos4?

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MaryF

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Hello,

Is it possible to connect a pdiff gard ring around a NMOS4 to a potential different from ground?

I tried it anyway and have gotten this DRC error:
"VART MIN_Element Rule : vart min length = 2.0" besides that of a "BAD_NWELL_WELLTAP_MULTICONN_ERC"

I appreciate any suggestions ...

Thanks
 

In standard JI CMOS the substrate will be tied to most negative
potential (perhaps some very special cases to the contrary).
Any P+ in P- substrate will have an ohmic ground connection.
You would have to provide the current, to establish any
voltage difference, and substrate current is generally not a
good thing.

A twin-well technology or SOI, would give you additional
freedoms at additional cost.
 
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    MaryF

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Hi,

Is it the case that your NMOS4 has a substrate at different potential than ground?
if so then you have to use local dedicated substrate not the global P sub. For that you can use deep N-well. It is the layer we use in the circumstance where the body of the mos is connected to the different potential tank vdd or ground.
Uses dnwell layer inside that a nwell + guard ring and inside guard ring NMOS4. Now you can connect this guard ring to any desire voltage you want to.

Best Regards,
Sagar
 
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    MaryF

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