Diaegus
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Hi guys,
I prototyped a four layer RF-PCB (1500um total height) and I am experiencing great differences between model and measurements of blind vias (from layer 1 to layer 2) in the operating frequency range (around 3GHz).
These are the parameters for the ADS model "MSUB" and "VIAGND":
Hsub=500um (substrate height from layer 1 to layer 2)
er=3.66 (relative dielectric constant)
D=600um (hole diameter)
T=20um (metalization thickness)
W=1130um (pad diameter)
which give something like 45pH as a result. On the other hand, extracting via contribution from a measurement on a simple circuit I found approximatively 0.8nH!
Have you ever experienced similar issues? Could you please recommend a good technique to model PCB vias (that you have already validated through experimental results)?
Thank you very much! :grin:
Diaegus
I prototyped a four layer RF-PCB (1500um total height) and I am experiencing great differences between model and measurements of blind vias (from layer 1 to layer 2) in the operating frequency range (around 3GHz).
These are the parameters for the ADS model "MSUB" and "VIAGND":
Hsub=500um (substrate height from layer 1 to layer 2)
er=3.66 (relative dielectric constant)
D=600um (hole diameter)
T=20um (metalization thickness)
W=1130um (pad diameter)
which give something like 45pH as a result. On the other hand, extracting via contribution from a measurement on a simple circuit I found approximatively 0.8nH!
Have you ever experienced similar issues? Could you please recommend a good technique to model PCB vias (that you have already validated through experimental results)?
Thank you very much! :grin:
Diaegus
