Here are some simple / basic classification schemes:
* one-time configuration (e..g. using antifuse technologies) != reconfiguration (e.g., using SRAM or Flash memory cells)
* full-chip reconfiguration != partial reconfiguration (some regions of the logic array are selectively reconfigurable)
* static (only one configuration is used) reconfiguration != dynamic or run-time reconfiguration (multiple configurations can be downloaded one after another during the application lifetime)
In general, dynamically reconfigurable (also called run-time reconfigurable) FPGAs are SRAM-based due to their fast configuration memory access (read/write).
Examples of commercially available FPGAs that support both partial and run-time reconfiguration are Xilinx Virtex and Spartan Series (incl. the newer ones) and Atmel AT40K/AT94K (FPSLIC).