vhdl parity check
Below is an example of Parity Check in VHDL, let me know if you need more information on how to check Parity.
-- ******************************************************************
-- parity check
-- high for odd numbers of ones
-- low for even numbers of ones
--
-- ******************************************************************
w_parity <= (r_sdata xor r_shift_in xor r_shift_out
xor r_srl_data_out xor r_rng_trig
xor r_max_stc xor r_rf_gate xor r_at_gate);