It will be much better if the dummies for the bottom NMOS transistors M7/8 are connected to gnd with all terminals shorted (of course, if possible). They will be out of the picture in this case. The way you've shown them connected is not correct because you short the drain of M7/8 to gnd - but probably it is just a drawing error.
Our layouters here always put the dummy transistors in the schematic and no extra tricks to be ignored by LVS. I think that's the cleanest approach.
We use cookies and similar technologies for the following purposes:
Do you accept cookies and these technologies?
We use cookies and similar technologies for the following purposes:
Do you accept cookies and these technologies?