They are the corners of that process, They are used to see if the circuit will still be in spec when NMOS transistors are "slower" than PMOS and vice-versa.
For NMOS,PMOS
tt - Typical, Typical
ff - Fast, Fast
ss - Slow, Slow
sf - Slow, Fast
fs - Fast, Slow
If your circuit simulation results are as expected in all the corners then there is "some" level of assurance that a "decent" number of chips will function properly after fabrication. For even "more" assurance you need to run Monte-Carlo analysis which varies the parameters of transistors statistically rather than fixed values like "slow" or "fast"
BTW, when you simulate by default the model used is "tt" typical,typical.