parallel vs pipelined

[babaduredi]

what is the difference between parallel process and pipe lined process in context of digital design, not to be confused with the processing used in processors.

 

[maulin sheth]

what is the difference between parallel process and pipe lined process in context of digital design, not to be confused with the processing used in processors.

Parallel means all process starts simultaneously .
Pipelined means :
Suppose take one example : any logic required 3 steps
.So if you are using pipelined architecture thn 1st step completes thn 2nd starts.
But whn 2nd step starts,we can access the 1st step for any other same logic implementation.So in this case we no need to wait for completion of all 3 steps as it is in serial.

You can see the following link for pipelined architecture :
**broken link removed**

 

[babaduredi]

Hi Maulin,
This is very general and i am aware of those facts. Is there something parallel and pipelined in verilog? I am not talking about blocking/non-blocking statements.
Thanks in advance.