Very inportant:
In your micro dspic33ev256gm106 the highest CPU Interrupt Priority Level is 0. Have you given level 0 to the comparator interrupt?
But one issue still remains there is a fixed delay of around 30 micro seconds of interrupt latency. How to reduce it?
From the datasheet I know that there is a Fixed Interrupt Entry and Return Latencies.
I have got the following questions:
1. What is the clock frequency?
2. Do you use power saving modes? I ask because in yours micro's datasheet is a chapter "INTERRUPTS COINCIDENT WITH POWER SAVE INSTRUCTIONS".
3. How did you measur this 30 us? You have a comparator output signal change as a start time moment. What event do you treat as an end time moment? One of the options is to set one GPIO pin at the very beginning of the ISR. If you followed this method, what instructions are before GPIO set?
...it should be coming back to the comparator interrupt without delay is my guess even it is executing some other interrupt.
Three very different things were mentioned:
* interrupts prioritization - double check if your interrupts have appropriate priority,
* nested interrupts - check if bit NSTDIS in INTCON1 register is 0,
* context switching - check how many clock ticks your micro needs to change the context.
Two questions before i really rewrite the code
1. Is the interrupt latency is fixed (even with small tolerance)?
2. Does the interrupt latency also depends on the code size of the ISR?
How do you define interrupt latency? Your micro has Fixed Interrupt Entry and Return Latencies. If you define interrupt latency as the time when your micro fully handles the interrupt - then yes, it depends on what instructions are in the ISR.