The lock detector is shifted in phase to produce max voltage when synchronous , whereas the loop detector is at mid-scale voltage giving negative feedback on phase error at all times within the constraints.
Since the lock detector peaks when locked, the feedback would be either positive or negative making the loop unstable.
There are many types of detectors. balanced bridge, XOR Type I ( both frequency doublers which mix the entire cycle) the transfer function is recursive and has a finite capture range and Type II phase/frequency detectors which are edge sensitive but infinite capture range and then synchronous multiplier, integrate and dump detectors, which give better noise immunity and perform a convolution integral of phase error with a matched filter on receiver input.