Output voltage of SG3525

[kriitish]

Hello Friends,
I am designing a Full bridge SMPS, I use SG3525 as the PWM controller and IR2112 as gate driver. I give 2.5V at pin 2 and 1.5V at pin1 of the IC SG3525. As far as my knowledge the SG3525 must give 8.5V as output voltage, but in my circuit only 2.5V is present at the output and it gradually starts decreasing. I don't know what is happening. I give 12V as input in pin 15(Vcc) and pin13(Vc). Could anyone tell me the mistake what I do. I need help friends.

Regards,
Kriitish

 

[ysba]

What do you meam by "giving" 2.5V and 1.5V at pins 2 and 1? Are you just testing the IC and applying voltages by yourself? What are you using to measure the output voltage?

 

[kriitish]

Yeah I am testing the IC. I grabbed it from a old power supply. The pin 16 normally gives 5.1 V, so I used resistor divider network to obtain 1.5V, 2.5V and I hooked it with pin1 and pin 2 respectively. I used multimeter to measure the output voltage.

 

[FvM]

For a serious answer, we need to see the complete test circuit, e.g. how the oscillator section is connected. In normal operation, each output gives below 50% PWM duty cycle, thus you won't see 8.5 V average output voltage in any case.

 

[ysba]

You should use an oscilloscope to evaluate the output PWM signal.

SG3524 is a closed loop controller. It will make the necessary effort (PWM's duty cycle) to make the two inputs of the error amplifier (pins 1 and 2) to be equal. Usually we put a fixed voltage at the non-inverting input, and a feedback signal at the inverting input. If the feedback signal is lower than the reference signal, the duty cycle will be increased until it reaches maximum value (50% for each output). If the feedback is greater than reference signal, the duty cycle will be decreased, and can be zero if you use fixed signals. In practice, a reduction in duty cycle makes the output voltage to decrease, which in turn forces the duty cycle to rise again, until the circuit reaches its steady-state.

 

[D.A.(Tony)Stewart]

When voltage on the Inverting Input (pin 1) is greater than voltage on the Non-Inverting Input (pin 2), duty cycle is decreased.
When voltage on the Non-Inverting Input (pin 2) is greater than voltage on the Inverting Input (pin 1), duty cycle is increased.

 

[kriitish]

Thank you guys. That was really helpful. :thumbsup: Will try to change the voltages and check the waveforms at the output pins.