Oscilloscope input circuits

[Vacuum]

oscilloscope input circuit

Hello!
Please see this boards https://www.knjn.com/docs/KNJN Flashy boards.pdf
It has a very interesting function - period out. Anyone know what components he use? How period of signal can be abtained? In my opinion, if he use comparator, equivalent sampling reconstruction will work proper only if period of input signal >> adc sampling period.:?: What another equivalent sampling methods exists?

Anyone can suggest some "open source" project?
I'm trying to implement analog input board (Pre-amp, triggering, ADC about 100MSPS) for my fpga development board.
Many thanks!

 

[laktronics]

oscilloscope input

Hi,
I thought finding the period of a signal is the easiest thing to do; simply AC couple the signal and measure the time between alternate zero crossing points?

In my opinion, if he use comparator, equivalent sampling reconstruction will work proper only if period of input signal >> adc sampling period.

I thought it is the other way around, equivalent Sampling method is mainly used to reproduce high frequency REPETITIVE signals with lower sampling rate, that is, the signal period is much less than the sampling period. What you have mentioned is called Real Time Sampling(RTS) and if the signal wave form is not repetitive, RTS is the only method.
As I understand, in Equivalent sampling method, the consecutive samples are taken at different phases of the wavefrom, from different cycles, and because waveform is repetitive, they can be used to assemble a single cycle as equivalent samples collected from the same cycle. That is why he has mentioned that the sampling frequency should not be multiples of signal frequency,( a very serious limitation indeed), as otherwise one has to generate a sliding random sampling rate, which he is not doing.

As regards project in this area I recommend you to contact M/S Tektronix, who are specialising in this field. For more information on this subject, visit their site
https://www.tek.com. You can also try www.sourceforge.net for any open source project in this area.

Regards,
Laktronics

 

[manuel1139]

adc08200 oscilloscope

Hi Surprisingly I have also visited their site while trying to build a scope frontend.

I know that they are using ADC08200 from national on one of their boards.

Here are some related sites:

**broken link removed**
http://www.bitscope.com/design/hardware/
http://www.johann-glaser.at/projects/DSO/schematic/

Biggest issue for me is to design the analog broadband receiver. I am going to use opa657 for that. However I am still at the stage at understanding how everything works.

Best Regards,
Manuel

 

[Vacuum]

schematic osciloscope input

Hello laktronix, thanks for comprehensive reply.
How to take samples at different phases? To use PLL will make rather difficult schematic (and is not clear for me, especially how to switch between real-time mode and RIS-mode). May be this phase shift implemented in FPGA?

 

[laktronics]

input oscilloscope circuit

Hi,
You are working on the edge of a very challenging technology and you should naturally expect only problems on your way.

As regards, when to switch from Real Time Sampling to Equivalent Sampling, I should think that when the sampling period is more than 1/3 of the signal period you should.This is where you start acquiring less than three samples per period, Tektronix says they need at least 2.5 samples per period to reconstruct the original waveform.

As regards acquiring the samples at different phases, if you are using a counter or shift register to generate the sampling pulse, you could load a random count or a random shift to coincide with the start of trigger and collect samples on the waveform at different phases of different cycles. It has to be done in FPGA, but wheter it can be done for such high frequencies or not is a point to be checked.

I am only wondering why people do not use multiple low cost ADCs with low sampling rate in parallel, driven with phased clocks, and store the AD values in multiple memory banks with interleaved addressing to get high speed RTS using slow ADCs.

Regards,
Laktronics

 

[lladnar23]

area26 dso

People do interleave lower-speed converters, but there are issues with synchronizing the clocks. Do a search in the literature for time-interleaved ADCs and you will find more info on this. The zero-order summary of the issue is that gain mismatches and timing differences between interleaved converters give rise to spurs at fractions of the total sampling rate....

 

[khach]

oscilloscope circuits

Tektronix use analog time interpolator like see attach. Also refer to us patents
US3790890
US4301360
US4728813
US5790480
US6194925

 

[FvM]

input circuit oscilloscope design

This basically a time-to-digital converter, allowing alignment of fixed time sample points related to trigger events. It should be considered, that sampling clock and timing circuit of these first generation digital oscilloscopes have been rather slow compared to todays technology, but time-to-digital is still used to further increase timing resolution with GHz sampling clocks.