[SOLVED] Oscillator conceptual basic 2

[timkuc]

What is onset of nonlinearity of a circuit? (I am reading about slightly Aβ>1 for the sustainable oscillations in practical oscillators)

 

[D.A.(Tony)Stewart]

Having loop gain >1 means faster more stable oscillation, but leading to saturation into a square wave.

At the threshold of the output clipping or getting distorted from saturation, the gain effectively decreases.

If this reduction in gain is sufficiently low where loop gain is just slightly <1 then oscillation will decay slowly.

The result is a stable sine wave output, so the gain does not need to be 1.00.... but the expense of slight harmonic distortion.

If there is excess gain at 360 deg or 0 deg margin frequency, the result will be a square wave, but fastest possible startup time limited by the resonator bandwidth.

 

[LvW]

1.) According to Barkhausen`s criterion, self-sustained oscillations are possible if and only if the loop gain LG=Aβ is exactly unity.
However, there is no design based on linear components (R, L, C, amplifiers) which exactly can meet this requirement (tolerances, temperature changes and other uncertainties).
For this reason, each harmonic oscillator is designed for a loop gain larger than unity (LG=Aβ>1).

2.) This enables a save start of oscillations because LG>1 leads to complex poles in the right half of the s-plane (RHP).
However, the amplitude of the sinusoidal signals will continuously increase until it will be clipped by the supply voltage limits. This will result in a bad signal quality (large THD).

3.) To avoid such a hard clipping and to improve non-linear distortions, in most cases a "soft-limiting" device is included which automatically decreases the loop gain "more softly".
There are several methods to perform this task - as the most simple method two anti-parallel diodes can be used across the gain-fixing resistor. As an alternative, one can use control-loop (AGC) based on an amplitude-controlled resistor (example: FET). It is the task of these non-linear devices to bring the loop gain LG automatically back to unity for rising amplitudes (to bring the poles back to the imaginary axis).

 

[timkuc]

At the threshold of the output clipping or getting distorted from saturation, the gain effectively decreases

Why ? Is it due to networks nature ? Thats again force me to ask that if yes then it is due to nonlinearity of active device ?

- - - Updated - - -

To avoid such a hard clipping and to improve non-linear distortions, in most cases a "soft-limiting" device is included which automatically decreases the loop gain "more softly".
There are several methods to perform this task - as the most simple method two anti-parallel diodes can be used across the gain-fixing resistor. As an alternative, one can use control-loop (AGC) based on an amplitude-controlled resistor (example: FET). It is the task of these non-linear devices to bring the loop gain LG automatically back to unity for rising amplitudes (to bring the poles back to the imaginary axis).

So we have to employ a external device for this? But I read on some sites and books that it is the nature of the network (so called onset nonlinearity of active device)which bring down the LG near to 1 (they called it as steady state) .
https://obrazki.elektroda.pl/8828966300_1412349672.jpg
https://obrazki.elektroda.pl/4961323000_1412349672.jpg

 

[FvM]

So we have to employ a external device for this? But I read on some sites and books that it is the nature of the network (so called onset nonlinearity of active device)which bring down the LG near to 1 (they called it as steady state).

The book says "onset of linearity", which isn't but a longwinded way to say that the nonlinearity is just beginning. Steady state means that the oscillation amplitude has settled to it's final value. As LvW explained, this only happens if the loop gain is unity (magnitude = 1, phase = 0). This is the LG for the fundamental frequency, in a non-linear circuit with respective distorted waveform, you have to perform a fourier analysis to determine it.

If it's suitable to utilize the nonlinearity of the oscillator gain element itself, or you better use additional circuit elements depends on the oscillator behaviour and requirements for distortions and amplitude stability. It can't be derived from general considerations.

 

[LvW]

So we have to employ a external device for this? But I read on some sites and books that it is the nature of the network (so called onset nonlinearity of active device)which bring down the LG near to 1 (they called it as steady state) .

If the employed amplifier has already such a non-linear behavior (internally) - fine! If not - you should provide it externally.

 

[D.A.(Tony)Stewart]

At the threshold of the output clipping or getting distorted from saturation, the gain effectively decreases

Why ? Is it due to networks nature ? Thats again force me to ask that if yes then it is due to nonlinearity of active device ?

- - -

So we have to employ a external device for this? But I read on some sites and books that it is the nature of the network (so called onset nonlinearity of active device)which bring down the LG near to 1 (they called it as steady state) .

YES nonlinear device

If a feedback amplifier of fixed gain starts to saturate and cannot increase much, the input can increase faster than the output.

i.e. the gain reduces

, But if signal tries to increase, but doing so stop Barkhausen condition for positive feedback oscillation at 0 or 360 deg etc , So there is a stable mode at unity gain controlled the "limiter" output feedback effect on gain.

Sine wave oscillators have unity gain stabilized between sufficiently >1 in pure linear mode and <1 when saturation begins.

More info

If there is excessive loop gain, and fixed input such as a LPF output of a saturated square wave being fed back in the loop, then a sine wave is not possible on output.

But with positive feedback it continues to oscillate at dominant frequency where loop phase shift is multiples of 360 deg. But the excess gain example above produces a reliable square wave when used with a CMOS inverter. 1 stage have a linear gain of ~10. Buffered Inverters ~1000 (3 stages) may be too much with spurious modes on some crystals.

 

[timkuc]

Thanks brothers (But questions will be keep coming .)