Starting from a higher clean frequency can help a PLL for a smaller output jitter.
On two layer board the only way is grounded coplanar lines. But the frequency is still small for this tehnique.
You need a continous ground plane one one layer and a signal route surrounded by ground plane on the other layer.
Both ground planes must be connected with small vias (as many vias near the 100Mhz clock line on both sides of the signal line, as better).
On FR4 this works great up to 5Ghz.quote]
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what is this applications?
From here I may download it???