Welcome to EDAboard.com

Welcome to our site! EDAboard.com is an international Electronic Discussion Forum focused on EDA software, circuits, schematics, books, theory, papers, asic, pld, 8051, DSP, Network, RF, Analog Design, PCB, Service Manuals... and a whole lot more! To participate you need to register. Registration is free. Click here to register now.

Register Log in

OPA optimal design question on hspice

Status
Not open for further replies.

andy2000a

Advanced Member level 2
Joined
Jul 18, 2001
Messages
597
Helped
14
Reputation
28
Reaction score
8
Trophy points
1,298
Activity points
5,298
opa hspice

from hspice demo file for OPA optimal design
and I simulation it on Hspice , will find 2 file tr0 & tr1 , why create 2 output file , and if manay W/L can meet optimal speci , hspice will point_out best ? or not

and may I use print to print out best circuit W/L ?

===== original file =================
*OPA design device want to optimal W/L
+ optimize the amp for minimum/100ns delay(both edge)/100ua + average output current/
+ /for capacitive load
.param area='4*wm1*lm + wm5*lm
+ wm6*lm + wm7*lm'
vx 1000 0 area ==> what is it ??
rx 1000 0 1k ==> what is it ??

.param wm1=opt1(60u,20u,100u) wm5=opt1(40u,20u,100u)
+ wm6=opt1(300u,20u,500u) wm7=opt1(70u,40u,200u)
+ lm=opt1(10u,2u,100u) bias=opt1(2.2,1.2,3.0)
.tran 2.5n 300n sweep optimize=opt1
+ results=delayr,delayf,tot_power,area_min model=opt
.model opt opt close=100 itropt=10
.tran 2n 150n
.measure delayr trig at=0 targ v(voutr) val=2.5 rise=1 goal=100ns weight=10
.measure delayf trig at=0 targ v(voutf) val=2.5 fall=1 goal=100ns weight=10
.measure tot_power avg power goal=10mw weight=5

==> calculate should use p(vdd) ??

.measure area_min min par(area) goal=1e-9
.print v(vin+) v(voutr) v(voutf)
 

Status
Not open for further replies.
Toggle Sidebar

Part and Inventory Search

Welcome to EDABoard.com

Sponsor

Top