Continue to Site

# Op-Amp Signal Conditioning for ADC

Status
Not open for further replies.

#### puppet.rhapsody

##### Newbie level 5
op amp signal conditioning

Hi, all

I am trying to design an input circuit for an ADC. ADC1173 is already selected for our design. To obtain a stable reference voltage for the chip, the circuit shown below is suggested. The reason, according to the spec. sheet, was that this op-amp circuit has low source impedance, reducing possible noise. Before I go ahead and blindly follow the suggested circuit diagram, I was trying to understand operational principle behind it, first. Unfortunately, it is not working well.

My main question would be ...

1. does the op-amp, LMC662, operate as simple buffer, even if it has bjt connected on the output node ?

2. what would be the output voltage of the op-amp, across the 100 ohm registor before the bjt ?

I don't have access to a reliable simulation program with a good library, so I can't trust ones that I tried.

I'm a junior engineer in co-op and still learning. Any intuitive advice would be really appreciated.

Sincerely,

YUI

op amps as signal conditioning circuit

1. the two opamp / bjt combos are just buffer to provide enough current on VRT and VRB.

2. it is approximately the voltage on that 1.20k resistor + Vbe of 2n3904 on the positive side, and - Vbe of 2n3906 on the negative side.

### puppet.rhapsody

Points: 2

Hi, millwood. Thanks a lot for the kind response and explanation.

1. You mentioned that the Op-Amp / BJT combos are there for sufficient current supply for the chip. Is this the case for this chip only, since it has internal connection between VRT and VRB, due to the way it is designed for reference V ? It seemd little odd, cause usually we want lower current going into a chip with hight input impedance.

2. How come Vin- follows the input voltage, not the Vout of op-amp ? If it is a voltage follower, it seems more reasonable that Vout follows Vin and VRT would be rather (Vout - Vbe).

Once again, I appreciate for the kind answer.

YUI

op amp signal conditioning design

1. I am not really sure why VRT/VRB needs that much power - I have yet to look at the datasheet for the device and I would suggest that you look there too.

2. I don't know what Vout you are talking about. This looks like an adc so its output is digital.

hope it helps.

Oh, I'm sorry.

I should have specified that I am more focusing on the Op-Amp, LMC662, part than ADC part. I meant output of LMC662 by Vout.

If I ask the second question in other words:

Why or how is voltage on VRT node (red circle) same as the voltage on the input node (orange circle), instead of the voltage on the op-amp output node (blue circle) ? It would make more sense for me, if the blue node follows the orange node's voltage, having red node voltage = blue node - Vbe.

I hope this clarifies it.

YUI

suvo

### suvo

Points: 2

because an ideal opamp has two input characteristics:

1) it has infinite open loop gain. This means that once a negative feedback loop is established, the non-inverting pin and inverting pin on the opamp have the same voltage.

2) it has no current following into or out of the input pins.

so in this case, the 4.7k resistor establishes the negative feedback. so the voltage on the non-inverting input pin is the same as the voltage on the inverting pin, thanks to #1 above.

and because of #2, there is no voltage flowing through the 4.7k resistor, so the joint of the 4.7k resistor and the 47R resistor has the same voltage.

### puppet.rhapsody

Points: 2
op amp signal

Oh, wow. Basically, all my questions was solved with the two fundamental principles of op-amps. I'm amazed how this circuit looks different now. I guess it is just so hard to see it, before one actually experiences it.

Anyways, I thank you very much. This helps a lot and now I actually understand this circuit. Much appreciated !

Sincerely,

YUI

PS: I'm new here and what does the donate point button do ?

Status
Not open for further replies.