In my design, there are three pins: Vdd, Vss and Out. Vdd=5V, Vss=0, Out pin is driven by an internal op amp and its normal swing range is from 0.5V to 4.5V.
In the application, this Out pin can be accidentally connected to a voltage within the range from 0V to -16V or from 6V to 16V. If this situation happens, I need to make Out as tri-state. How to do that? Thanks1
Does your internal op amp use a process which can stand + or -16V? If not, I think only an outside protection circuit can do the job. (2 comparators + electronic switch).
In my process, there are some 18V devices, like DMOS, or PMOS/NMOS with source and drain extended. The thing is my op amp output swing is 10% to 90% of VDD.
As this is a MOS Op Amp, the parasitic reverse diodes of the output transistors of your Op Amp should stand the ≈15mA ((16V - Vf(diode)) / 1kOhm) - depending on the w/l ratio of the output transistors of your Op Amp. (If you can afford a series resistor even > 1kOhm, it would be still better - more secure.)
If your output transistors aren't big enough for the above calculated current, you must either increase the series resistor, or use larger Op Amp output transistors. Calculate that the parasitic reverse diodes of the output transistor stage can stand about the same current as the output stage of your Op Amp can (could) deliver.
Tri-stating the output stage would be possible, but wouldn't help against the current from the external source flowing through the series resistor and one of the parasitic reverse diodes to either VDD or GND of the Op Amp.
Thanks for your reply. My design requires that output should be tri-state if output is connected to voltage within the range from 6-16V or from 0V to -16V