One point of Miller compensation is to transform a smaller capacitance to a bigger value and it will appear on the highest resistive value node, which is the OTA's output. It determines the dominat pole, you should add parasitics closer to that node, so I think (c) is better than (d).
Other thing, Cc is usually a MIM (Metal-Insulator-Metal) or MOM (Metal-Oxide-Metal) capacitor, where the parasitic capacitances at the pins are not the same regurarly in the model, so actually at one end of Cc you have x*Cc, on the other end y*Cc. These are coming from the MIM's and MOM's structure, and you should connect that terminal of Cc closer to the OTA's output which has the bigger parasitic capacitance, from last reason I mentioned above. I think this is logical, not sure.
Btw run a simulation with foundry models, and where the stability is better choose that arrangement.