On wafer calibration using TRL

[maria fernanda]

Hi!

I'm designing a microwave switch and I'm using CPW to connect it to RF Probes. I mean, I added pads to connect the switch which is smaller than pads dimensions to Probe tips (GSG) because I am using a Probe station. The substrates used are GaAs and silicon. I wish to know if the TRL calibration standard placed on wafers (in order to remove pads effects and carry out calibration with these standards), remove PADS effect, and PROBE ERRORS and VNA error? Or it is necessary carry out another calibration? i.e, ISS?.

What is the correct process to eliminate PROBE,VNA,CABLES and PADS erros?.

Another question!

It is necessary to use de-embedding for removing pads effects or TRL calibration standards remove it.

I hope somebody could help me!

Thanks so much..

Maria Fernanda

 

[madengr]

TRL can be used on wafer but the line lengths may become too long at low frequencies. There are other methods such as LRM and SOLT.

I would suggest buying WinCal since it has LRM and multi-line TRL built in. Most VNAs do not have these algorithms so you need external software. They also sell calibration substrates which will get you calibrated to the probe tips.

https://www.cmicro.com/go/WinCal