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# Nyquist sammpling freq. with synchronizer

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#### yuvalkesi

##### Member level 5
Suppose I want to sample low clock freq. (100MHz) signal with a high clock freq. (150MHz). Both siganl are produced at very close freq., only 50MHz difference.
Is the nyquist sampling rate valid here?
I mean, nyquist speaks about sampling an analog signal to a digital one, so when vice versa, the analog signal will be equal to the original. This is not the case, but still, it seems that a regular 2-flops synchronizer will not be suffice, so what is?
Thx.

Very surely, the problem hasn't to do with Nyquist theorem. But it's not clear what "sampling a low clock freq" exactly means for you. Can you show a timing diagram of the expected behaviour?

In the general case, we would assume that both clocks are unrelated and don't necessarily have an exact integer frequency ratio, so the clock edges will continously shift against each other. A possible interpreation of "sampling" could be that you want exactly one pulse in the 150 MHz domain for each 100 MHz pulse, which generally works for f1 <= f2;

Hi,

Nyquist is valid.

If you want to convert a (useful) signal of any frequency you need at least twice the sampling frequency.

Additionally to sample a squarewave signal you have to take care of the overtones. 3x, 5x , 7x, 9x, 11x... of fundamental (here 100Mhz).

Theretically you may use specifically "undersampling" then you should know about the alias, or mirrored frequencies...

Klaus

If you sample a 100 MHz signal at 150 MHz, you will get the mirror signal at
fs/2 - (fin - fs/2) = 75 - (100 - 75) MHz = 50 MHz.

That is called "aliasing" and is normally not wanted, but it can be useful (the "undersampling" mentioned by KlausST).

Hi,
If you sample a 100 MHz signal at 150 MHz, you will get the mirror signal at
fs/2 - (fin - fs/2) = 75 - (100 - 75) MHz = 50 MHz.

This true. But a "clock" signal - like the OP mentioned has overtones:

300MHz --> DC
500MHz --> 50MHz
700MHz --> 50MHz
900MHz --> DC
and so on..

far away from a square wave..

Klaus

Suppose I want to sample low clock freq. (100MHz) signal with a high clock freq. (150MHz). Both siganl are produced at very close freq., only 50MHz difference.
Is the nyquist sampling rate valid here?
I mean, nyquist speaks about sampling an analog signal to a digital one, so when vice versa, the analog signal will be equal to the original. This is not the case, but still, it seems that a regular 2-flops synchronizer will not be suffice, so what is?
Thx.
Unlike others have assumed, I believe you unfortunately used the term Nyquist when you actually were interested in understanding what is the highest frequency signal you can reliably sample through a meta-stability resolution synchronizer and still capture all the transitions.

Nyquist does not directly apply here as a square wave clock (as pointed out by others) is an infinite series of the odd harmonics of the fundamental. Your original description translates to the following diagram:

As you can see the clock edge of the 150 MHz will line up with every third edge of the 100 MHz which means you can't reliably capture all the edges of the 100 MHz with a 150 MHz clock. Yes you can shift the phase of the clock and find a spot where the 150 MHz can reliably capture the pulses of the 100 MHz, but only in the ideal case, frequency drift, frequency accuracy, etc will shift that ideal phase relationship and will eventually result in trying to capture the 100 MHz while it's transitioning.

To reliably capture a signal in the 150 MHz clock domain the minimum pulse width (high or low) of the signal being captured (sampled) must be >= Tpw+Tsu+Th.

You can see from the timing diagram that any phase shifting of the clock with the "data" (lower freq clock) will ensure that one of the data edges will always be outside the Tsu-to-Th window of the FF.

Did you realize that the question was posted in the programmable logic section and is related to logical signals. A logical signal has per se infinite bandwitdh (zero rise time of the value) so it's a problem beyond all Nyquist theories.

Respectively the question can be answered referring to logic circuits and their waveforms, pulse widths, edges, setup and hold times etc.

O.K., I see ads-ee clarified things in detail while I was writing my post.

Nyquist, mirror frequency, aliasing etc. are still valid to some extent. The result after sampling will be a 50 MHz clock/logic signal as calculated in post #4, but it will have a lot of jitter if the input signals are not locked to each other.

Even for logic signals the theoretical maximum frequency is half the clock rate, which is Nyquist transferred into the digital world.

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Even for logic signals the theoretical maximum frequency is half the clock rate, which is Nyquist transferred into the digital world.
Your statement depends on the assumption that you need a signal with alternating level e.g. a squarewave as output signal, or more generally a waveform that is defined by it's edges. But the assumption is not necessarily correct.

Instead, if you treat the sampled signal as a clock enable signal in the 150 MHz domain, Fin <= Fs would be sufficient. A toggle synchronizer is the usual means to transfer it.

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