moisiad
Member level 4
Hi
In a typical folding & Interpolating architecture, there are two main parts: the Coarse Quantizer and the Fine Quantizer. In all the papers that i have seen the Coarse Quantizer is of 2Bits and the rest of bits(4 up to 6) are related with the Fine Quantizer. In this way, ADCs with bit numbers up to 8 are implemented.
My question is why the Coarse Quantizer is not implemented to provide more bits (4 for example) in order to increase the overall bit number of the ADC (up to 10bits). Unless i miss something, this would increase the available resolution of the folding & Interpolating architecture.
Thanks
In a typical folding & Interpolating architecture, there are two main parts: the Coarse Quantizer and the Fine Quantizer. In all the papers that i have seen the Coarse Quantizer is of 2Bits and the rest of bits(4 up to 6) are related with the Fine Quantizer. In this way, ADCs with bit numbers up to 8 are implemented.
My question is why the Coarse Quantizer is not implemented to provide more bits (4 for example) in order to increase the overall bit number of the ADC (up to 10bits). Unless i miss something, this would increase the available resolution of the folding & Interpolating architecture.
Thanks