Hi,
Your info. is too limited.
It can be all sorts of things - your instances not being recognized, your pins not being extracted, etc. , etc.
Not only do you have to check layout visually, sometimes you have to check the settings when running LVS.
E.g. case-sensitive LVS run will not match Net_1400_arc_1iN42_net_veryConfusing_141551_bus_115 with Net_1400_arc_1IN42_net_veryConfusing_141551_bus_115
Is device extraction working ok (parallel/serial devices may have been merged)?
Have you accidentally named normal connections to instance with bus naming style?
Does the LVS see a short connection with substrate layers which the "mark net" doesn't recognize? (I'm assuming you're using Virtuoso "mark net" command)
Best regards,
I-FAB