no output in waveform in modelsim

[nursafirah]

i have a problem in waveform it not appear in output wave..can anyone give the solution in this problem...below is my coding and waveform.

-- router module
-- forwards packets to neighbouring routers and local network adapter
-- routing priorities given to : local, N, E, S, W inputs
-- each input has 2 levels of buffers
-- packets held in buffers when a higher priority input also wants to write to same output
-- also held in buffers if the output is busy
-- an output is set to busy when the input buffer is being used and therefore cannot take any more input packets

library ieee;
use ieee.std_logic_1164.all;
use ieee.numeric_std.all;

entity router is
       
        port (
                clk             : in std_logic;
                nreset        : in std_logic;
                
                --busy signals                 - 0 = local, 1 = north, 2 = east, 3 = south, 4 = west
                busy_in              : in std_logic_vector(2 downto 0);
                busy_out             : out std_logic_vector(2 downto 0);

                local_pkt_in         : in std_logic_vector(15 downto 0);
                local_pkt_out        : out std_logic_vector(15 downto 0);
                
                north_pkt_in         : in std_logic_vector(15 downto 0);
                north_pkt_out        : out std_logic_vector(15 downto 0);
                
                east_pkt_in          : in std_logic_vector(15 downto 0);
                east_pkt_out         : out std_logic_vector(15 downto 0)
                
                
                
        );
end router;

architecture rtl of router is

        -- bus_array - 0 = local, 1 = north, 2 = east, 3 = south, 4 = west
        type bus_array_type is array(integer range 2 downto 0) of std_logic_vector(15 downto 0);

--        signal bus_array_in                         : bus_array_type;
        signal bus_array_boundary_in         : bus_array_type;
        signal bus_array_out                         : bus_array_type;



        signal buffer_level1                         : bus_array_type;
        signal buffer_level2                         : bus_array_type;
                
        signal buffer_level1_used                 : std_logic_vector(2 downto 0) := "000";
        signal buffer_level2_used                 : std_logic_vector(2 downto 0) := "000";
        
begin

        bus_array_boundary_in(0) <= local_pkt_in;
        bus_array_boundary_in(1) <= north_pkt_in;
        bus_array_boundary_in(2) <= east_pkt_in;
        
                
        local_pkt_out         <= bus_array_out(0);
        north_pkt_out       <= bus_array_out(1);
        east_pkt_out         <= bus_array_out(2);
       
        
        busy_out                <= buffer_level1_used;
                
        process(clk)
                variable is_collision         : std_logic_vector(2 downto 0); 
                
                type bus_array_type is array(integer range 2 downto 0) of std_logic_vector(15 downto 0);
                
                variable bus_array_in                         : bus_array_type;
                
                type yx_array_type is array(integer range 2 downto 0) of std_logic;
                
					 
                variable y                                         : yx_array_type;        
                variable x                                         : yx_array_type;
				
        
                variable sign_y                                 : std_logic_vector(2 downto 0);        
                variable sign_x                                 : std_logic_vector(2 downto 0);
					 
                type integer_array_type is array(integer range 2 downto 0) of natural range 0 to 3;
                variable direction                         : integer_array_type;
                
        begin
                        
                if (rising_edge(clk)) then 
                        if nreset = '0' then
                                bus_array_out(0) <= (others => '0');
                                bus_array_out(1) <= (others => '0');
                                bus_array_out(2) <= (others => '0');
                               
                                
                                buffer_level1_used <= "000";
                                buffer_level2_used <= "000";
                                
                                buffer_level1(0) <= (others => '0');
                                buffer_level1(1) <= (others => '0');
                                buffer_level1(2) <= (others => '0');
                                
                                buffer_level2(0) <= (others => '0');
                                buffer_level2(1) <= (others => '0');
                                buffer_level2(2) <= (others => '0');
                                
                                
                        else
                                --default values
                                bus_array_out(0) <= (others => '0');
                                bus_array_out(1) <= (others => '0');
                                bus_array_out(2) <= (others => '0');
                                

                        
                                for i in 0 to 2 loop --for each input bus array
                                        
                                        -- choose an input (packet_in or buffer1)
                                        if (buffer_level1_used(i) = '1' ) then
                                                bus_array_in(i) := buffer_level1(i);
                                        else
                                                bus_array_in(i) := bus_array_boundary_in(i);
                                        end if;
                                        
                                        sign_y(i) := bus_array_in(i)(15);
                                        sign_x(i) := bus_array_in(i)(13);
                                        y(i) := bus_array_in(i)(14);
                                        x(i) := bus_array_in(i)(12);
													 
													 
                                        
                                        --calculate desired direction
                                        if ((bus_array_in(i)(11) = '0' and bus_array_in(i)(10) = '0' and bus_array_in(i)(9) = '0')) then
                                                direction(i) := 3; --empty
														if (y(i) ='1') and (x(i)= '1') then
                                                if (sign_y(i) = '1')and (sign_x(i)='1') then
																		  direction (i):=0;--local
                                                        direction(i) := 1; --north
                                                elsif (sign_y(i) = '0') and (sign_x(i)='0') then
																		  direction (i):=0;--local
                                                        direction(i) := 2; --east
																elsif (sign_y(i)= '1') and (sign_x(i)='0')then
																			direction (i):= 1;--north
																			direction (i):= 2;--east
																elsif (sign_y(i)= '0') and (sign_x(i)= '1')then
																			direction (i):=0;--local
																			direction (i):= 1;--north
																			direction (i):= 2;--east
                                                end if;
															elsif(y(i)= '0') and (x(i)= '1')then
																	direction (i):=0;--local
															elsif (y(i)= '1')	and (x(i)= '0')then
																	direction (i):= 1;--north
															elsif (y(i)= '0')and (x(i)= '0') then
																	direction (i):= 2;--east
															end if;
													 
                                    
													 
                                        --if not empty packet
                                        if(bus_array_in(i)(11) = '1' or bus_array_in(i)(10) = '1' or bus_array_in(i)(9) = '1') then

                                                --check for collisions with busy_in and all previous bus_array_in's

                                                is_collision(i) := '0'; --flag

                                                if( busy_in(direction(i)) = '1') then --check busy signal
                                                        is_collision(i) := '1';
                                                elsif( i > 0 ) then
                                                        --check bus_array_in's with higher priority
                                                        for j in 0 to i-1 loop 
                                                                if(direction(i) = direction(j)) then --this does not include if they're both empty due to outer if statement above
                                                                        is_collision(i) := '1';
                                                                end if;
                                                        end loop;

                                                end if;
                                        
                                                if (buffer_level1_used(i) = '1' and is_collision(i) = '1') then
                                                        buffer_level1(i) <= buffer_level1(i);
                                                        buffer_level1_used(i) <= '1';
                                                elsif (buffer_level1_used(i) = '1' and buffer_level2_used(i) ='1' and is_collision(i) = '0') then
                                                        buffer_level1(i) <= buffer_level2(i);
                                                        buffer_level1_used(i) <= '1';
                                                elsif ((bus_array_boundary_in(i)(11) = '1' or bus_array_boundary_in(i)(10) = '1' or bus_array_boundary_in(i)(9) = '1')
                                                                        and buffer_level1_used(i) = '1' and buffer_level2_used(i) ='0' and is_collision(i) = '0') then
                                                        
                                                        buffer_level1(i) <= bus_array_boundary_in(i);
                                                        buffer_level1_used(i) <= '1';
                                                elsif ((bus_array_boundary_in(i)(11) = '1' or bus_array_boundary_in(i)(10) = '1' or bus_array_boundary_in(i)(9) = '1')
                                                                        and buffer_level1_used(i) = '0' and buffer_level2_used(i) ='0' and is_collision(i) = '1') then
                                                        
                                                        buffer_level1(i) <= bus_array_boundary_in(i);
                                                        buffer_level1_used(i) <= '1';
                                                else
                                                        buffer_level1(i) <= (others => '0');
                                                        buffer_level1_used(i) <= '0';
                                                end if;
                                                
                                                if (buffer_level1_used(i) = '1' and buffer_level2_used(i) = '1' and is_collision(i) = '1') then
                                                        buffer_level2(i) <= buffer_level2(i);
                                                        buffer_level2_used(i) <= '1';
                                                elsif ((bus_array_boundary_in(i)(11) = '1' or bus_array_boundary_in(i)(10) = '1' or bus_array_boundary_in(i)(9) = '1') 
                                                                and buffer_level1_used(i) = '1' and buffer_level2_used(i) = '1' and is_collision(i) = '0') then
                                                        
                                                        buffer_level2(i) <= bus_array_boundary_in(i);
                                                        buffer_level2_used(i) <= '1';
                                                elsif ((bus_array_boundary_in(i)(11) = '1' or bus_array_boundary_in(i)(10) = '1' or bus_array_boundary_in(i)(9) = '1') 
                                                                and buffer_level1_used(i) = '1' and buffer_level2_used(i) = '0' and is_collision(i) = '1') then
                                                                
                                                        buffer_level2(i) <= bus_array_boundary_in(i);
                                                        buffer_level2_used(i) <= '1';
                                                else
                                                        buffer_level2(i) <= (others => '0');
                                                        buffer_level2_used(i) <= '0';
                                                end if;                        
                                                        

                                                --send to output
                                                if (is_collision(i) = '0') then
                                                   if (y(i) ='1') and (x(i)= '1') then
																		if (sign_y(i) = '1')and (sign_x(i)='1') then
																			bus_array_out(0) <= sign_y(i) & y(i)  & sign_x(i) & x(i) & bus_array_in(i)(11 downto 0);
																			bus_array_out(1) <= sign_y(i) & y(i)  & sign_x(i) & x(i) & bus_array_in(i)(11 downto 0);
																		elsif (sign_y(i) = '0') and (sign_x(i)='0') then
																			bus_array_out(0) <= sign_y(i) & y(i)  & sign_x(i) & x(i) & bus_array_in(i)(11 downto 0);
																			bus_array_out(2) <= sign_y(i) & y(i) & sign_x(i) & x(i) & bus_array_in(i)(11 downto 0);
																		elsif (sign_y(i)= '1') and (sign_x(i)='0')then
																			bus_array_out(1) <= sign_y(i) & y(i)  & sign_x(i) & x(i) & bus_array_in(i)(11 downto 0);
																			bus_array_out(2) <= sign_y(i) & y(i)   & sign_x(i) & x(i) & bus_array_in(i)(11 downto 0);
																		elsif (sign_y(i)= '0') and (sign_x(i)= '1')then
																			bus_array_out(0) <= sign_y(i) & y(i)& sign_x(i) & x(i) & bus_array_in(i)(11 downto 0);
																			bus_array_out(1) <= sign_y(i) & y(i)& sign_x(i) & x(i) & bus_array_in(i)(11 downto 0);
																			bus_array_out(2) <= sign_y(i) & y(i) &sign_x(i) & x(i) & bus_array_in(i)(11 downto 0);
																			
																		end if;
																	elsif(y(i)= '0') and (x(i)= '1')then
																			bus_array_out(0) <= sign_y(i) & y(i)& sign_x(i) & x(i) & bus_array_in(i)(11 downto 0);
																	elsif (y(i)= '1')	and (x(i)= '0')then
																			bus_array_out(1) <= sign_y(i) & y(i) & sign_x(i) & x(i) & bus_array_in(i)(11 downto 0);
																	elsif (y(i)= '0')	and (x(i)= '0')then
																			bus_array_out(2) <= sign_y(i) & y(i)& sign_x(i) & x(i) & bus_array_in(i)(11 downto 0);
																	end if;
																		  
                                                end if;
															end if;	--is collision
                                        end if;			--empty packet
                                end loop;                --i        
                        end if;                         --reset
                end if;                                 --rising_edge clk
                                
        end process;

end rtl;

 

[verylsi]

Comment the three lines after ( default values in else condition before your for loop starts )
Try avoiding for loops.
you are forcing the 3 outputs to 0 in reset condition as well as without reset condition

 

[nursafirah]

which line i have avoiding for loops...

 

[ads-ee]

You should post your testbench router_vhd_tst so we can check what else it might not be driving like busy_in.

Regards

 

[nursafirah]

-- Copyright (C) 1991-2013 Altera Corporation
-- Your use of Altera Corporation's design tools, logic functions 
-- and other software and tools, and its AMPP partner logic 
-- functions, and any output files from any of the foregoing 
-- (including device programming or simulation files), and any 
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-- to the terms and conditions of the Altera Program License 
-- Subscription Agreement, Altera MegaCore Function License 
-- Agreement, or other applicable license agreement, including, 
-- without limitation, that your use is for the sole purpose of 
-- programming logic devices manufactured by Altera and sold by 
-- Altera or its authorized distributors.  Please refer to the 
-- applicable agreement for further details.

-- ***************************************************************************
-- This file contains a Vhdl test bench template that is freely editable to   
-- suit user's needs .Comments are provided in each section to help the user  
-- fill out necessary details.                                                
-- ***************************************************************************
-- Generated on "05/15/2014 23:37:23"
                                                            
-- Vhdl Test Bench template for design  :  router
-- 
-- Simulation tool : ModelSim-Altera (VHDL)
-- 

LIBRARY ieee;                                               
USE ieee.std_logic_1164.all;                                

ENTITY router_vhd_tst IS
END router_vhd_tst;
ARCHITECTURE router_arch OF router_vhd_tst IS
-- constants                                                 
-- signals                                                   
SIGNAL busy_in : STD_LOGIC_VECTOR(2 DOWNTO 0);
SIGNAL busy_out : STD_LOGIC_VECTOR(2 DOWNTO 0);
SIGNAL clk : STD_LOGIC;
SIGNAL east_pkt_in : STD_LOGIC_VECTOR(15 DOWNTO 0);
SIGNAL east_pkt_out : STD_LOGIC_VECTOR(15 DOWNTO 0);
SIGNAL local_pkt_in : STD_LOGIC_VECTOR(15 DOWNTO 0);
SIGNAL local_pkt_out : STD_LOGIC_VECTOR(15 DOWNTO 0);
SIGNAL north_pkt_in : STD_LOGIC_VECTOR(15 DOWNTO 0);
SIGNAL north_pkt_out : STD_LOGIC_VECTOR(15 DOWNTO 0);
SIGNAL nreset : STD_LOGIC;
COMPONENT router
	PORT (
	busy_in : IN STD_LOGIC_VECTOR(2 DOWNTO 0);
	busy_out : BUFFER STD_LOGIC_VECTOR(2 DOWNTO 0);
	clk : IN STD_LOGIC;
	east_pkt_in : IN STD_LOGIC_VECTOR(15 DOWNTO 0);
	east_pkt_out : BUFFER STD_LOGIC_VECTOR(15 DOWNTO 0);
	local_pkt_in : IN STD_LOGIC_VECTOR(15 DOWNTO 0);
	local_pkt_out : BUFFER STD_LOGIC_VECTOR(15 DOWNTO 0);
	north_pkt_in : IN STD_LOGIC_VECTOR(15 DOWNTO 0);
	north_pkt_out : BUFFER STD_LOGIC_VECTOR(15 DOWNTO 0);
	nreset : IN STD_LOGIC
	);
END COMPONENT;
BEGIN
	i1 : router
	PORT MAP (
-- list connections between master ports and signals
	busy_in => busy_in,
	busy_out => busy_out,
	clk => clk,
	east_pkt_in => east_pkt_in,
	east_pkt_out => east_pkt_out,
	local_pkt_in => local_pkt_in,
	local_pkt_out => local_pkt_out,
	north_pkt_in => north_pkt_in,
	north_pkt_out => north_pkt_out,
	nreset => nreset
	);
clk_signal : PROCESS                                              

BEGIN                                                         
    clk <= '0';			   -- clock cycle is 5 us
wait for 10 ns;
    clk <= '1';
wait for 10 ns;

END PROCESS clk_signal;

init : PROCESS                                              
                                    
BEGIN                                                         

		nreset  <= '1';
		local_pkt_in <= "1101111111111111";
		wait for 20ns;
		north_pkt_in <= "0101111111111111";
		wait for 20ns;
		east_pkt_in <= "1111111111111111";
		wait for 20ns;

WAIT;                                                        
END PROCESS init;                                          
END router_arch;

 

[nursafirah]

verylsi: what do u mean bout forcing the 3 outputs to 0 in reset condition as well as without reset condition? can u explain more?

- - - Updated - - -

when i Comment the three lines after ( default values in else condition before your for loop starts ), the output has come utilization "U". i want the output come out with value same as input that i set in testbench. how can i solve this problem?

 

[verylsi]

I take my words back whatever I said in my previous comment.
U have to check the section where you are updating direction, as you are using variables they will update immediately, seems like u worked on C or C++ before.
please use variables carefully..

"elsif (sign_y(i)= '0') and (sign_x(i)= '1')then direction (i):=0;--local direction (i):= 1;--north direction (i):= 2;--east"

the above snippet means nothing but direction (i):= 2;--east" as the other 2 statements will never execute.


(also U is uninitialized)

 

[nursafirah]

mean the variables is wrong? what should i do for solve this problem...i think my collision is wrong...i really need your help... i just want the output in modelsim coming out.. pleased help me..:sad: