Hi,
Please could i just do a reality check and confirm that no base resistor is needed in the attached NPN base drive?
LTspice and jpeg schem attached.
The NPN is just for a digital high/low output (from its collector) when the opto_diode current source is turned on (5mA) and off (0mA)
The design is depending on the CTR and input current. If limited on coupler input
current and the CTR limitations will limit current into external transistor
base. That being said I would think about using a R to limit input current
to external transistor should the coupler input driver fail with high current.
Keep in mind graphs are typical values, not worst case, in general in datasheet.
Asymmetrical timing is primarily caused by the optocoupler itself, but no timing requirements have been mentioned at all. You can however omit Q1, it has no purpose with 10k load.