the_pro
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hello... every one.
i'm newer in this field.
i have a small doubt about pass characteristic of nmos transistor.
if i will give Vdd=1.8 v (logic ' 1' ) to the gate terminal and its drain terminal has also 1.8 v then source will go up to maximum voltage level Vdd-Vtn.
now if i change the transistor width up to 30 times greater then its length then will my source exceed Vdd-Vtn level and reach nearer to Vdd ?
thanks in advance...
i'm newer in this field.
i have a small doubt about pass characteristic of nmos transistor.
if i will give Vdd=1.8 v (logic ' 1' ) to the gate terminal and its drain terminal has also 1.8 v then source will go up to maximum voltage level Vdd-Vtn.
now if i change the transistor width up to 30 times greater then its length then will my source exceed Vdd-Vtn level and reach nearer to Vdd ?
thanks in advance...