sdc18
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Hey all,
I am beginning to write a paper on a new technique for making pulse-width generators on FPGAs and I was hoping I could get some help connecting it to the current state-of-the-art and get suggestions for some applications.
My circuits use a new technique for laying out logic elements. Each circuit maps an input pulse of width w_{in} to an output pulse of width w_{out} through any arbitrary function f(w_{in})=w_{out}. The function f can be linear, quadratic, etc. and the resolution of the function is the minimum gate delay ~300ps. Again, this is an asynchronous circuit, so there is little to no latency.
What similar technologies are out there?
What applications can this have? I have been using it for an arbitrary pulse-width doubling circuit, but I suspect there are better applications in other areas of engineering.
I am also looking for helpful references for my paper.
Thanks!
I am beginning to write a paper on a new technique for making pulse-width generators on FPGAs and I was hoping I could get some help connecting it to the current state-of-the-art and get suggestions for some applications.
My circuits use a new technique for laying out logic elements. Each circuit maps an input pulse of width w_{in} to an output pulse of width w_{out} through any arbitrary function f(w_{in})=w_{out}. The function f can be linear, quadratic, etc. and the resolution of the function is the minimum gate delay ~300ps. Again, this is an asynchronous circuit, so there is little to no latency.
What similar technologies are out there?
What applications can this have? I have been using it for an arbitrary pulse-width doubling circuit, but I suspect there are better applications in other areas of engineering.
I am also looking for helpful references for my paper.
Thanks!