Aug 26, 2012 #1 A ASHA DIVAKARAN Newbie level 1 Joined Aug 19, 2012 Messages 1 Helped 0 Reputation 0 Reaction score 0 Trophy points 1,281 Activity points 1,285 Network on chip for MAC operations in an FPGA Hi all, i am doing a project on network on chip to interconnect multiplier accumulator operations in Spartan 3A DSP FPGA.. Will torus topology do??? How can NoCs be verified???
Network on chip for MAC operations in an FPGA Hi all, i am doing a project on network on chip to interconnect multiplier accumulator operations in Spartan 3A DSP FPGA.. Will torus topology do??? How can NoCs be verified???