It works as a diode switch, without any current gain.i do not see how the NPN can pull it down (up?) to 0?
no idea
my apologies if i am stating the obvious, or missed it in the text
the positive reset circuit has SD2, where the negative reset does not
U4A and U4B are wired differently
if the negative peak detect is at -1 V when the peak is detected, (plot wthout zero crossing)
the NPN reset transistor (T1a) has its collector at negative voltage -
i do not see how the NPN can pull it down (up?) to 0?
I think T1A should be a PNP.
Both transistors might be zapped by reverse emitter-base voltages more than 6V unless they have protection diode circuits.
The reset switches are bad designed, particularly for the negative peak detector. The collector base junction will be forward biased by negative signals.
A saturation voltage of -340 mV is however not plausible. It looke like the circuit has hidden connections.
Before suggesting a simpler alternative, is it safe to assume the input will be a sine wave centerd on 0V and at a fixed low frequency (< 1KHz)?
Do you want an output that gives you a steady voltage that just tracks the positive and negative extents of the signal or one that drops to zero every cycle as at present?
Hint: I'm thinking along the lines of a sample and hold circuit that 'samples' half way between zero crossings to find the waveform peaks.
Brian.
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