Need VCXO PLL Design for T1/E1 (ref. des, methods, etc.)

[VicL]

mt9076 software drivers

Need VCXO PLL Design for T1/E1 (ref. des, methods, etc.)

 

[talpina]

TO RESPECT THE G703 REQUIREMENTS YOU CAN USE A SIMPLE 2048 +- 50 PPM OSCILLATOR THAT NOT REQUIRE A HARD SCHEMATIC

 

[VicL]

RE

TO RESPECT THE G703 REQUIREMENTS YOU CAN USE A SIMPLE 2048 +- 50 PPM OSCILLATOR THAT NOT REQUIRE A HARD SCHEMATIC

I have incomming data link E1.
I`m need to extract clock and form some framing signal
from data stream

 

[talpina]

if you need only to extract clock and timing you can use or LIU(line interface unit) and Framer (you can also implement it in a FPGA) or you can use a single chip (liu + framer ) that perform all operations.
the only one that you need is a oscillator +- 50 ppm to meet the E1 requirements.
look to dallas-maxim or infineon or zarlink to find the appropiate device or a data sheet to now ohw to.

bye

 

[papyaki]

Hi,

As talpina wrote, you can use

Dallas DS2155 LIU + PLL + Framer + 2*HDLC :
h**p://w*w.maxim-ic.com/quick_view2.cfm?qv_pk=2859&ln=

Infineon FALC56 (PEB2256) LIU + PLL + Framer + 3*HDLC :
h**p://w*w.infineon.com/cgi/ecrm.dll/ecrm/scripts/prod_ov.jsp?oid=13588&cat_oid=-10080

Pmc Sierra E1XC (PM6341) LIU + PLL + Framer :
h**p://w*w.pmc-sierra.com/products/details/pm6341/index.html

Zarlink MT9076B LIU + PLL + Framer + 3*HDLC :
h**p://products.zarlink.com/product_profiles/MT9076B.htm

All these chips are working with a standard 50ppm oscillator. In some case you can download software drivers from the manufacturer's site

 

[VicL]

Hi,

As talpina wrote, you can use

Dallas DS2155 LIU + PLL + Framer + 2*HDLC :
h**p://w*w.maxim-ic.com/quick_view2.cfm?qv_pk=2859&ln=

Infineon FALC56 (PEB2256) LIU + PLL + Framer + 3*HDLC :
h**p://w*w.infineon.com/cgi/ecrm.dll/ecrm/scripts/prod_ov.jsp?oid=13588&cat_oid=-10080

Pmc Sierra E1XC (PM6341) LIU + PLL + Framer :
h**p://w*w.pmc-sierra.com/products/details/pm6341/index.html

Zarlink MT9076B LIU + PLL + Framer + 3*HDLC :
h**p://products.zarlink.com/product_profiles/MT9076B.htm

All these chips are working with a standard 50ppm oscillator. In some case you can download software drivers from the manufacturer's site

We are use MT9076 + MT9042 (PLL)

MT9076 have a 2.048/1.544 extracted frequency,
and we use MT9042 for 16.384 and some framing pulses
generation.

But custom PLL more coct effective.

 

[papyaki]

Hi

Keep locking at :

h**p://w*w.actel.com/appnotes/s04_18.pdf

Remember to take care about jitter if you want to devellop your own PLL

 

[VicL]

Hi

Keep locking at :

h**p://w*w.actel.com/appnotes/s04_18.pdf

Remember to take care about jitter if you want to devellop your own PLL

Thanks!
I have this documents.
But VCXO PLL more cheap and effective, IMHO

 

[BenKropp]

Hi,
if you want to synchronize your system clock to different reference clocks take a PLD, divide the system clock (generated by a VCXO) and reference clock to e.g. 8kHz (=>frame sync) and combine them with XOR logic. The result is a measure for the clock difference. You can feed it to the VCXO adjust via an integrator build with resistor/capacitor.

 

[oscilentinc]

Hey guys if i was in your filter and trying to alter the timing of those vcxos what I would do is go to VCXO Manufacturers, Designers, and Suppliers of Products and see if i could figure out exactly what kind of oscillator or filter i need tof that timing.