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need some paper about pipline adc, thank you

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gdhp

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1:
C.S.G. Conroy, A High-Speed Parallel Pipeline A/D Converter Technique in CMOS, Ph.D. Thesis, University of California at

2:
C. S. G. Conroy, D. W. Cline, and P. R. Gray, “An 8-bit 85MS/s parallel pipeline A/D converter in 1-mm CMOS”, IEEE J. Solid-Stage Circuits, vol. 28, no. 4, April 1993, pp. 447-454

3:
C. S. G. Conroy, “A high-speed parallel pipeline A/D converter technique in CMOS”, Memorandum No. UCB/ERL M94/9, Electronics Research Laboratory, U. C. Berkeley, February 1994

thank you very much!
 

Chethan

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Post it in IEEE paper wanted section. U might get some help there.
 

Syukri

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Those are other people paper...can use it as refference but copying is prohibited.
 

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