Need homework and solution for berkeley ee240 byAli Niknejad

[hotraymanf]

ee240 berkeley

sping 2006,it seems a password is needed,could someone has access to it help me ?
i am very appreciate your help!
also about the project ,thank you all so much!

 

[Jim cage]

ee240 niknejad homework

Does anyone here took the course ?
we will all appriciate if deboy or frank (from the videos) would share us the knowledge...

 

[longstar]

ee240 niknejad 2006

You can download the videos without the password.

 

[femtopiconano]

ee240 solution berkeley

Who could help me with question 5 of the attached homework ?
Which spice circuit to simulate ?
How to arrange the voltage and source current to keep v*=2Id/gm constant while varying Vds ?

Thanks.

Question 5 :
Plot the output resistance ro and DC gain gmro versus VDS for an NFET and PFET. To maintain a DC gain of 80% of the peak value, what is the allowed output swing? Bias the transistor with V* = 200mV. What is λ? Explain a possible reason for the difference between the NFET and PFET.

 

[femtopiconano]

plot 2id/gm for mos

Who can help me with this question :?:
I want to simulate it within Cadence :|

 

[Jim cage]

ee240 niknejad

You need to connect AC source to the output and measure the rout of the device and use parameteric sweep on the vds and observe the gm of the device in cadence's calculator. you will see then the intrinsic gain gm*ro.
The gain is a function of vds and the swing allowed is where the gain drops below some amount from both sides (e.g., 0.3V to 1.5V).

 

[Julian18]

Re: Need homework and solution for berkeley ee240 byAli Nikn

You need to connect AC source to the output and measure the rout of the device and use parameteric sweep on the vds and observe the gm of the device in cadence's calculator. you will see then the intrinsic gain gm*ro.
The gain is a function of vds and the swing allowed is where the gain drops below some amount from both sides (e.g., 0.3V to 1.5V).

I think u can get the rout by using
.probe rout = par('1/gdso(MOS)')

is that feasible???

Added after 1 minutes:

also , i need the homework and solution and project of EE240, anyone can help me here?

Thanks

 

[xdyrick]

Re: Need homework and solution for berkeley ee240 byAli Nikn

in cadence ".probe rout = par('1/gdso(MOS)')" is it possible? I doubt it.
So, does anyone has some suggestions on how to plot mos intrinsic gain? thanks!

You need to connect AC source to the output and measure the rout of the device and use parameteric sweep on the vds and observe the gm of the device in cadence's calculator. you will see then the intrinsic gain gm*ro.
The gain is a function of vds and the swing allowed is where the gain drops below some amount from both sides (e.g., 0.3V to 1.5V).

I think u can get the rout by using
.probe rout = par('1/gdso(MOS)')
~~~~~~~~~~~~~~~~~~~~~~~
is that feasible???

Added after 1 minutes:

also , i need the homework and solution and project of EE240, anyone can help me here?

Thanks