Jan 28, 2015 #1 H Hui2 Newbie level 1 Joined Jan 28, 2015 Messages 1 Helped 0 Reputation 0 Reaction score 0 Trophy points 1 Activity points 6 Hello guys, I am facing hard time with filter as shown below. Would you anyone help me with the vcdl code for this? it should start with entity FIR is generic( size : positive :=16; taps : positive := 4 ); port( clk,resetn : in std_logic; in1 : in std_logic_vector(size-1 downto 0); out1 : out std_logic_vector(2*size-1 downto 0) ); end FIR; Thank you a lot,
Hello guys, I am facing hard time with filter as shown below. Would you anyone help me with the vcdl code for this? it should start with entity FIR is generic( size : positive :=16; taps : positive := 4 ); port( clk,resetn : in std_logic; in1 : in std_logic_vector(size-1 downto 0); out1 : out std_logic_vector(2*size-1 downto 0) ); end FIR; Thank you a lot,