need help with a folded cascode design

[airboss]

Hi,

I'm designing a folded cascode in tsmc018 with Vcc=1.8v.

I'm supposed to get M16, M7, M8 in deep triode region. However, from DC simulation, I got M16, M10-13 in triode, while two input fets, M1, M2, and M17, M18, M9, M15, M7 and M8 are OFF!


any opinions are appreciated!

 

[tangqin55]

You must be careful in designing fold-cascode circuit in the low-power process,maybe you can increase the W/L .which can make current bigger ang VDSAT lower.

 

[airboss]

I replaced the CMFB topology I used with an ideal op amp, sensing the output common mode and then feedback to cascode. It works well. I got what I designed. So I think the problem is, how do I fix the sizing so that M1, M2, M9, M7-9, M15, M17, M18 can "wake up"? I mean, work in the region I want instead of cutoff?!

 

[DenisMark]

tangqin55 is right. You must be more careful.

For example: Voltage at the source of TNbiasSF must be Vtn+2Vov minimum (~1V). U have 1.7V -> minimum out. voltage ~1V. Voltage at gates M5,M6 - 340mV -> maximum out. voltage ~1V. It's close to match.

I repeat, u must be more careful, consider body effect, in some situation u must eliminate it.