Need help to design a sigma delta modulator in verilog to simulate in Xilinx

[snali]

Hi,
I need help for designing a sigma-delta modulator in verilog. If anybody has any verilog code of sigma delta modulator, please post here. Also, if anybody has any documents or tutorial or books (pdf) of any helpful link related to sigma-delta modulator, please post here.

Thanks

Nijam

 

[snali]

...Please, if anybody has any idea or resources, share here. It is very urgent for me.

---------- Post added at 03:27 ---------- Previous post was at 03:26 ----------

...Please, if anybody has any idea or resources, share here. It is very urgent for me.

Thanks

Nijam

 

[ld283]

Hope this helps:
https://www.xilinx.com/support/documentation/ip_documentation/opb_deltasigma_adc.pdf
It gives a very general idea of how a sigma delta converter can be implemented on a FPGA.