Also, maybe the clock gating is not the solution at all, depending what you want to do. For example, often having a "load enable" in a digital register is better than gating the clock. The "clock enable" is often a simple multiplexer which either loads the register with it's old contents or with the new value.
Be aware that gating a clock is always a bit tricky business, making easily glitches. You should draw the pulse diagrams, including circuit delays, and really see through all situations where one path may be faster than other (they usually are, and in a very unpredictable way: Be aware of component variations, load differences, temperature changes, and maybe even wind direction, monday mornings, plain bad luck and other more or less unknown factors)