Welcome to our site! EDAboard.com is an international Electronics Discussion Forum focused on EDA software, circuits, schematics, books, theory, papers, asic, pld, 8051, DSP, Network, RF, Analog Design, PCB, Service Manuals... and a whole lot more! To participate you need to register. Registration is free. Click here to register now.
Attached is the result (a) of data sync circuit. In (a) clk2 is in-sync with data. I need to implement circuit (b) in order to create a pulse (c) when one of the clocks is in-sync with data. Any ideas how to do circuit (b)?
This site uses cookies to help personalise content, tailor your experience and to keep you logged in if you register.
By continuing to use this site, you are consenting to our use of cookies.
