buckaroo
Member level 3
hi
i'm working on a 32.768KHz pierce crystal oscillator, which was used in a FM tranceiver, the phase noise is -114dbc(at)100Hz,
-122dbc(at)1KHz, there are much spur @N*32KHz, the spur is made by the buffer, why, how to reduce it? the big feedback bias
resistor between D and G of the MOST is realized by a weak-invesion linear region MOST, when i replace it by a 20M resistor,
the phase noise is 10dbc better.
i get the output from the G terminal of the MOST, because it's a clean sine wave, the duty cycle is bad when from the D
terminal(however i find many others get the output from the D terminal), why?
now, i have some questions: is the phase noise too bad? how to measure the jitter, the value i caulated is so big that i
can't believe... are there any other method to realize the big feedback bias resistor? the linear MOST resistor make phase
noise much worse.
thanks a lot
i'm working on a 32.768KHz pierce crystal oscillator, which was used in a FM tranceiver, the phase noise is -114dbc(at)100Hz,
-122dbc(at)1KHz, there are much spur @N*32KHz, the spur is made by the buffer, why, how to reduce it? the big feedback bias
resistor between D and G of the MOST is realized by a weak-invesion linear region MOST, when i replace it by a 20M resistor,
the phase noise is 10dbc better.
i get the output from the G terminal of the MOST, because it's a clean sine wave, the duty cycle is bad when from the D
terminal(however i find many others get the output from the D terminal), why?
now, i have some questions: is the phase noise too bad? how to measure the jitter, the value i caulated is so big that i
can't believe... are there any other method to realize the big feedback bias resistor? the linear MOST resistor make phase
noise much worse.
thanks a lot
