NEED ANALOG EXPERT's HELP ON THIS CKT

[xihuwang]

A temperature-independent current source ckt as the image shown.

What's the operation of this ckt ?
The M5-M7 and R3 make up of the start-up ckt, but why it still be on
after power up stage ?
The temperature sweep simulation resulst show the deviration of output
current is smaller than that without M5-M7 and R3.

Icq1 is VEB/R1, which decrease with temperature.
Icq2 is ptat .
So Ic3 is temperature-independent.



Added after 1 minutes:

Sorry, Q3 is diode connected .

 

[xihuwang]

pls help
Is there any suggestion >?

 

[rajanarender_suram]

properly give how mos transistor gates are connected..

Added after 4 minutes:

i.e gates of M1 M2 M3 M4

 

[xihuwang]

 

[rajanarender_suram]

i think its a temperature compensated current source

R1 current is I1=Vbe(Q4 or Q5)/R1 PTAT current
current in R2 is I2= (Vbe4-Vbe5)/R2=VT*ln(multiplier)/R2 CTAT current.

these two currents addup at collector of Q1 & Q2 gives temperature compensated current source

 

[snafflekid]

It is called a double bandgap, that uses current summing rather than the typical Brokaw cell design (by the way, Paul Brokaw is one of the nicest guys you will ever meet.)

Delta Vbe=(Vbe5+Vbe2)-(Vbe3+Vbe4) You have a nice multiplication effect of the areas of Q3 and Q4 which increases the size of the delta Vbe signal i.e., if Q3 and Q4 are 4x, delta Vbe=Vt*ln(16)

The choice of current summing is odd to me, since that is reserved for when there is low voltage headroom. But this circuit is cascaded and must have plenty of headroom.