Need a specfic detail about metal width and spacing..

[Nantha]

Hi guys,

I am very beginner for this layout... I wanna know about metal width and spacing.. I got some specification [exp:like for width -> 1um space -> 0.5um]

I'm wondering how they are calculating this space for specific width it should the space....
Is it any general formula is there?? Please any one explain me..

Thanks in advance,
Nantha

 

[egg]

ask the guys who develop process, I think the space is to guarantee the yield.

 

[vlsi123]

Hi,

It is not actually this space for this width something like that.
If you clearly understand the CMOS Fabrication Process you will get an idea.
Minimum Width of the metal is to ensure that it should not result in any open circuit during etching process of CMOS Fabrication step.
Similarly Min Spacing is because there should not be any short circuit with other lines.
The width and spacing differs for different technology nodes as well as for different foundry process.
It mainly depends on fabrication process. The Process Engineer can give more information regarding this.

 

[Nantha]

Hi vlsi123,

Thanks a lot..

Rgds,
Nantha