[ncverilog] STIL simulation

[maulin sheth]

Hello all,

I want to know that How to simulate STIL patterns in ncverilog? I have to use only STIL vectors not the STILDPV. Patterns are generated by TMAX (Synopsys ATPG tool).

Please help me to perform this simulation.


Thanks & Regards,
Maulin Sheth.

 

[rca]

you need to have a parser to read the stil to transform in force signal in the simulator.
or to trust tetramax to be able to generate the testbench in verilog.