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NCVerilog problem with nospecify and notimingcheck options

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leeguoxian

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Dear All :

I used to think that for prelayout gate level netlist , we can use nospecify and notimingcheck option to run simulation to verify wihtout sdf annotated . But I used these two option for both ncverilog and vcs , and result turn out to be different . Ncverilog failed while vcs passed .

I am now confused that whether should I use nospecify and notimingcheck again ? Or when should I use these option .

Thanks
 

nospecify

leeguoxian said:
Dear All :

I used to think that for prelayout gate level netlist , we can use nospecify and notimingcheck option to run simulation to verify wihtout sdf annotated . But I used these two option for both ncverilog and vcs , and result turn out to be different . Ncverilog failed while vcs passed .

I am now confused that whether should I use nospecify and notimingcheck again ? Or when should I use these option .

Thanks

This is classic problem of the ncverilog and vcs simualtors. by default, notiming check is enabled. incase of nospecify is depends on the library. i do have similar issues. in ncverilog try runnning without nospecify.
 

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