The first "cut" is, does this repeat with a different flash chip
in the same hardware (board, supply)? Chasing a defect is a
waste of time.
The next "cut" might be to determine the character of any
repeatable "bit flip". For starts, is it a single bit (if this is not
a multilevel flash, where bits can change with less charge
creep) or multiple discrete bits that have gone bad? Or is
it really a false write, or a read marginality during power up?
Third "cut" - how does the "bit flip" behavior change as you
from minimum powered-down, through waypoints to the 2-
hour failing case? What does the supply do meanwhile (e.g.
fail to ever fully discharge, but sit at 1V where nothing pulls
current? Different turnon behaviors between warm, cold and
"dead cold" startup, that might challenge close-in LDOs'
ability to hold off high dV/dt input supply (HF PSRR, soft
start or the lack?)?
Start cutting apart the knot, across a few planes, and
confusion should start to fall away.