N-type and P-type antenna diodes roles

Yes, Thank you erikl.

Say we can use both n+p or p+n antenna diode in my design to protect both pMOS and nMOS gate.

Here I would choose n+p diode as p sub is grounded. What would you choose?
n+p or p+n ?
I need to know the advantages and disadvantages of these two over each other.
Special cases where these diodes are used.

Prashanthanilm said:

... What would you choose? n+p or p+n ?
I need to know the advantages and disadvantages of these two over each other.

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Didn't I tell this before? Pls. read thoroughly!

I needed more clarification actually.
Thank you Erikl

- - - Updated - - -

I needed more clarification actually.
Thank you Erikl

Prashanthanilm said:

I needed more clarification actually.

Click to expand...

I think I've responded to your above questions. If you need more clarification, I suggest you ask concrete, precise, tangible questions.

erikl said:

Not at all.


Possible, but IMHO impractical: it's much simpler to add one more (min. area) p⁺ diffusion (the antenna diode) next to the p⁺ source diffusion of the pMOS, and connect it to its gate. --> Shorter connection to the gate to be protected.

But in principle you are right: actually it doesn't matter where the antenna diode resides (if you don't get antenna error(s) for lower metal(s)) - and if it's n⁺p or p⁺n - or both (e.g. the output driver of an I/O pad).

Click to expand...

Hi erikl,

I have one doubt. Referring to this patent "http://www.google.com/patents/US6091114"...
In the fourth last paragraph he says that when the n+ gated diode(n+ antenna diode)is connected to the NMOS gate and there is accumulation of positive ions, the n+ gated diode(antenna diode) gets reverse biased. The p substrate will be in depletion mode and it shunts the current to the substrate.

The question is ...

As the diode is in reverse bias condition, does it shunt the charges through the reverse leakage current (without breakdown)?? Or the diode breaks down and allows the current and thus the gate is protected??
Please explain me what happens when we use n+ diode to protect say NMOS under two conditions -->
1. When there is positive charge accumulation
2. When there is negative charge accumulation:-( :-( :thumbsdown:

Hello starinspace,

antenna diodes help in both cases: in forward direction as a matter of fact, in reverse direction, usually their leakage current - or their breakdown voltage - will avoid gate breakthrough. See the last paragraphs of these posts.

erikl

The polarity of in-process metal charging is irrelevant. It's the
signal position relative to what it travels over, where you'd
like the diode to sit, that determines the species.

Now, you might find special cases where it's better to use
a P diode in NWell, than a N diode in Psub - like a low current
bias line that sets PMOS current mirror racks, a capacitance
to Vss aggravates the PSRR more than a capacitance to the
Vdd where all the sources are referred (and, there is likely
also more opportunistic placement to be had).

But generally, "what works, for where you want to put it" is
the deal. These are "patch" elements, not operational ones
(unless you screw up).

Hi erikl,
Can you please explain me about the operation of P+ n substrate diode in antenna effect point of view ???.
Thanks in advance..

I think this has been explained sufficiently in the posts before. Just study the full thread, and perhaps the many threads about antenna diodes in this forum.