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Multiplying integer variables in verilog

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hassanzia

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Hi,

Is it possible to multiply integer variable in a verilog for loop?

example
Code:
integer i,j = 0;

for (i=0; i<10; i=i+1)
j = 16 * (i+1);
 

yes, should be possible, but in your case, the answer is just a constant.
 

Its giving a syntax error whenever I try to do this. (HDLCompiler : 806, if that helps)
 

why not post the actual code and the actual error? or read what the error says and fix it? Syntax errors are normally self explanitory.
 

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