multiplexed address/data bus
Hi jboud
It looks like you may be reading the port LATCH and not the port PINS
- check your generated assembly code is reading register 0xF83 (PORTD)
I suggest that the TRISD 0xFF is placed BEFORE the Negative Read Strobe (NRD)
You may well have a problem with bus contention.
The PROTECTED data sheet of the MFRC531, that you have had problems unlocking, states that the data lines will be asserted within 65ns of the leading negative edge of the read strobe NRD.
At max clock the 18F452 takes 100ns per instruction - releasing the bus (trisd 0xff) after asserting the strobe is too late!
As I read the timings - most of your delays could be removed as they are unnecessary with the 18F452 at 40MHz.
hope this helps - Polymath