Kid_Bengala
Junior Member level 2
aes vhdl
hi
I´m new to VHDL and attacked me two questions. The first is that I have fallen in some cores Opencore and I've seen that have multiple files. vhd. I had scheduled so far in any one know how to access various files and implemented in an FPGA.
The other question I have is to use a core from another core. So far I have planned little things, which included data on the one hand, makes a few changes and leave other pins. Let me explain, I have a code to access a flash memory, this is implemented in the FPGA and operates correctly, the problem is that this memory is encrypted with DES or AES, so I dropped from a cryptographic core Opencore but not How to make accessing the memory, the cryptographic core for this medium and decrypts the data (MEMORY -> DES CORE -> FLASH CORE). Any help or advice for this newbie in VHDL? . Thank you very much.
Greetings
Antony
hi
I´m new to VHDL and attacked me two questions. The first is that I have fallen in some cores Opencore and I've seen that have multiple files. vhd. I had scheduled so far in any one know how to access various files and implemented in an FPGA.
The other question I have is to use a core from another core. So far I have planned little things, which included data on the one hand, makes a few changes and leave other pins. Let me explain, I have a code to access a flash memory, this is implemented in the FPGA and operates correctly, the problem is that this memory is encrypted with DES or AES, so I dropped from a cryptographic core Opencore but not How to make accessing the memory, the cryptographic core for this medium and decrypts the data (MEMORY -> DES CORE -> FLASH CORE). Any help or advice for this newbie in VHDL? . Thank you very much.
Greetings
Antony