multiple threshold MOS

[shiva_vlsi]

Hi
Can any one clarify my doubts.....

1) Is it possible to use different threshold voltage MOS transistors in one design,I mean for example consider a CMOS full adder can i use PMOS transistors with different Vthp i.e, Vthp1=-0.65v,Vthp2=-0.5v NMOS transistors with different Vthn i.e, Vthn1=-0.45v,Vthn2=-0.45v.
Is it acceptable Or Is there any rule that all the PMOS devices in the design shud have same Vhp and all NMOS devices in the design shud have same Vhn.


2) Generally in the designs the critical path transitors have the large dimensions and low Vth to minimize the critical path delay.
Then How to change the Vth of these critical path transistors.Can we change it manually in the SPICE parameters.
How to design variable threshold (with dynamic body bias generation) circuit .


Thanks

 

[madhavisai]

in ur design u can use low vt cells in critical path which will give u timing optimization and in noncritica path we use high vt cell which optimize power and area.like this u can use different voltage cells that technology is called MTCMOS multi threshold cmos.

 

[pra]

Hi
Can any one clarify my doubts.....

1) Is it possible to use different threshold voltage MOS transistors in one design,I mean for example consider a CMOS full adder can i use PMOS transistors with different Vthp i.e, Vthp1=-0.65v,Vthp2=-0.5v NMOS transistors with different Vthn i.e, Vthn1=-0.45v,Vthn2=-0.45v.
Is it acceptable Or Is there any rule that all the PMOS devices in the design shud have same Vhp and all NMOS devices in the design shud have same Vhn.


2) Generally in the designs the critical path transitors have the large dimensions and low Vth to minimize the critical path delay.
Then How to change the Vth of these critical path transistors.Can we change it manually in the SPICE parameters.
How to design variable threshold (with dynamic body bias generation) circuit .


Thanks

u need to get the libraries for the high vt n low vt MOS and use those in spice simulations
Otherwise create some dummy libraries in spice for multi vt transistors!!

 

[balan]

hi,
normally vth depends on vth= vth0+√((vsb+2Φf)-(2Φf)),
you can change the vth value by changing the vsb value, normally both the source and bulk will be connected together to avoid variations and to maintain vth same. but you can connect the bulk to supply voltage if PMOS and to ground if NMOS, this will have a change in vth value from transistor to transistor.

but to have specific vth values create your own dummy library.


thank you,

 

[sarad_kath]

hi .....

most of our frens said that in mtcmos different vth is used but i have one doubt ....i am using cadence virtuoso........ as i want ot use mtcmos concept without using any body biasing to change vth,,,,,,,,so
can we use sizing of mtmcos transistor to vary threshold voltage???