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Multiple clocks with synchronous design

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rajesh0therascal

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I have a 16 MHz clock on board. I need 250 Hz, 1/3 Hz and 1/21 Hz clocks for inner logic circuits to work.. I have derived 250 Hz clock in synchronous manner using clock enable. So now can I use that 250 Hz to derive rest of the clocks or should I use 16 MHz clock for clock division.

Since deriving 1/3 and 1/21 from 250 Hz clocks require counters or registers of smaller size, Im inclined to do the same.

Kindly Help..

Thank You in advance.
 

TrickDicky, That is not my question.. I'm asking whether to derive Clock enable from master clock or from the other derivatives which are already synchronous and slow.
 

its easier to derive them from the master clock. If you derive them from the slower clock enables, the enable will be high for a long time, unless you get them to turn themselves off (that would probably use less logic).
 

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