While doing synthesis if there are multiple clock domains we can either use set_clock_group or set false paths for all the paths among the multiple clock domains. What the advantages and disadvantages between these two ways of either using set_clock_group or setting false paths among clock domains.
set_clock_groups doesn't necessarily false paths between different clock domains. You have to provide switch "-asynchronous" to false path with other domain. I find set_clock_groups -asynchronous easier to specify than setting false path as you have to specify false path between different pair of clock domains if you have more than 2 domains whereas in set_clock_groups it automatically false path between all other domains