Multi-vth design not performed

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onta00

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I’m trying to implement my design using two libraries, one containing cells with low threshold voltage, and the other one with high threshold voltage, in order to minimize the leakage power. I included them in the link library and target library, but at the end of the process, design compiler has used only cells of the library with higher threshold voltage. Why? Did I miss something to allow dc using both libraries ?
 

Did you have set
set_scenario_option -leakage_power true
or
set_leakage_optimization true
 

oratie said:
Did you have set
set_scenario_option -leakage_power true
or
set_leakage_optimization true
Click to expand...

yes i used set_leakage_optimization true, but the result is the same
 

if you have any scenarios defined, you should use set_scenario_option.
 
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    onta00

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The fact is I have no scenarios set
 

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