[MOVED] vlsi chip designing.....

[Muthuraja.M]

Hi friends....


How to design a buffer . Is buffer a latch or a inverter pairs ..

pls suggest me how to use buffer in modelsim ?

 

[dillikumar406]

Re: vlsi chip designing.....

buffer can be constructed as a cacaded version of two inverters. latch is a memory element which adds some amount of delay to the output and also requires clock.

 

[Muthuraja.M]

Re: vlsi chip designing.....

If we use two inverters means how can we achieve delay in modelsim simulator.


Without using clock is it possible to design buffer


If means how, pls reply .....

 

[dillikumar406]

Re: vlsi chip designing.....

we can design buffer without using clock also. i dont know modelsim simulator

 

[Muthuraja.M]

ok fine. Tell me the basic idea to design the buffer ?

 

[matter]

A buffer is nothing but two inverters connected in series (as posted earlier by dillikumar).

Clock does not come into picture at all ever in buffer design. I do not understand why you are even bringing clock in the question.

Buffers and latches are not even in the same class of cells. A buffer is a combination cell and obiviously does not have a clock.
A latch on the other hand is a sequential element which must have a clock.